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hi. my name is steve, a training engineerat altera. the quartus ii software contains many useful on-chip debugging tools. one ofthese tools, called signalprobe, gives you the ability to connect to almost any internalsignal in your design and bring it out to an unused i/o pin without having to fullyrecompile. let me show you how it works. to start creating signalprobe pins, you haveto first fully compile your design at least once. this design is already compiled, soi'll open up the signalprobe pins dialog box. there are no signalprobe pins yet, so i'll add one. to create a signalprobe pin, you must specifytwo basic pieces of information: the internal signal you want to tap, otherwise known asthe source node, and the location of the unused

i/o pin you want the signal to connect to. the source node can be selected using the node finder. the node finder has a special filter thatwill only display internal signals that can be tapped. i'll select that filter and lookat the list of tappable nodes. i want to monitor the status of this pushbutton,so i'll move it over to the selected nodes list. before selecting the pin location, i'llgive a custom name to this signalprobe pin to help identify it from any others i create. now i'll select the unused i/o pin i wantto use from this list. i happen to know that pin l7 is connected to a green led on my board,so this will be perfect for monitoring the pushbutton. next i'll create a signalprobe pin for aninternal signal and synchronize its monitoring

to a clock domain. again, i'll use the signalprobefilter in the node finder to find the signal: a memory load enable control. pin k6 connects to a different green led. when i specify that this signalprobe pin shouldbe registered, i have to select a clock signal. i'll choose a top-level clock domain, againusing the node finder. notice that the status of the two signalprobepins i've created is "need to compile". however, i don't need to perform a fullcompilation. i'll perform a special signalprobe compilation by clicking here. a signalprobe compilation is much faster thana full compile because all it does is perform

incremental routing, adding available routingwires to the existing post-fit netlist to connect from the source node to the selectedunused i/o pin. notice the signalprobe pins are now "routed". you can verify this in the fitter compilationreport. you can also verify the successful additionof the signalprobe pins in the change manager. signalprobe pins are ecos, or engineeringchange orders, small changes that are added to the post-fit netlist. the change managerkeeps track of these ecos. the signalprobe compilation also created anew programming file. i'll now program my board with the added signalprobe pins usingthe quartus ii programmer.

this simple design has a load state, wherethe contents of a rom are loaded into a ram, and a display state, where the contents ofthe ram are displayed in sequence on the seven-segment displays. pushing this button switches betweenthe states. the first signalprobe pin, coming from thepushbutton signal, was connected to the green led on the far right. the leds are wired activehigh, so notice that as long as i press the button, grounding the signal, the led staysoff. the load enable signal was connected to thesecond led. you can see that this active high signal lights the led when in the load state,indicated by ld on the seven-segment displays, and turns it off in the display state.

pretty cool, huh? in just a couple of minutes,i was able to output internal design signals to unused i/o pins. i connected the signalsto leds, but you could just as easily connect to lab bench equipment, such as an oscilloscopeor a logic analyzer, for more detailed debugging. to learn more about signalprobe and the otherdebugging tools and features built into the quartus ii software, visit the altera trainingwebsite at www.altera.com/training.